06. Model Example Catalog
The examples/ directory has working small models. They all run with
the same CLI flow (validate → compile → run → compare). This page is a
one-stop index of which example covers which ops.
Silicon-validated models (P06/P07/P08) live on their own pages — 08 / 09 / 10.
Basic Four
| Example | Model | Key ops | backends |
|---|---|---|---|
examples/tiny_mlp/ | 2-layer MLP → softmax | linear, relu, softmax | cpu_ref, npu_sim, zynq_ps |
examples/tiny_cnn/ | Conv → pool → FC → softmax | conv2d, maxpool2d, linear | cpu_ref, zynq_ps |
examples/tiny_transformer/ | Single decoder block | linear, attention_core, layernorm | cpu_ref, npu_sim, zynq_ps |
examples/robotics_policy_net/ | 3-layer MLP policy | linear, relu, tanh | cpu_ref, npu_sim, zynq_ps |
Each example contains five files:
spec.yaml— the eulernpu specweights.npz— weightsinput.npz— inputgolden.npz—cpu_refgolden outputoptimization_profiles.yaml— 5 optimization profiles (when present)
Run example (tiny_mlp):
EX=examples/tiny_mlp
eulernpu validate $EX/spec.yaml
eulernpu compile --spec $EX/spec.yaml --weights $EX/weights.npz --out /tmp/mlp
eulernpu run --artifact /tmp/mlp --input $EX/input.npz --out /tmp/mlp.out.npz
eulernpu compare --got /tmp/mlp.out.npz --expected $EX/golden.npz
Applied Four
| Example | Model | Key ops |
|---|---|---|
examples/tiny_lstm_anomaly/ | LSTM anomaly detector | lstm_cell, sigmoid, slice |
examples/tiny_transformer_policy/ | Transformer policy | attention_core, silu, sequence_last |
examples/quantized_cnn_int8/ | Quantized CNN | quantize, dequantize, global_avgpool2d |
examples/robot_nav_policy/ | Robot nav MLP (12D→4) | linear, relu, softmax |
Read quantized_cnn_int8 together with 05. quantize.
New Op Group (0.5.0)
Small examples for ops added as P02 / P03 prerequisites:
| Example | Key new ops |
|---|---|
examples/flash_attn_decoder/ | flash_attention (Dao 2022 online softmax) |
examples/vit_patch_embed/ | image_norm, patch_embed, cls_token_prepend |
examples/ddim_denoise_step/ | timestep_embed, cfg_scale, ddim_step |
examples/edge_moe_transformer/ | router_linear, moe_topk_route, moe_expert_ffn |
examples/edge_action_graph/ | graph_conv, node_pool, edge_aggregate |
examples/robot_fusion_policy/ | gated_fusion, cross_modal_concat |
examples/decoder_kvcache/ | kv_cache_append, rotary_embed, temperature_scale |
Each new op pairs with an HLS kernel in eulernpu/hls/kernels/. NumPy
equivalence test + header syntax test + cycle model test — verified at
three levels.
Full-Graph Models
The above examples are per-op small demos. Full-graph full
models live in the examples/silicon_*/ directories, and some are silicon-
validated:
| Project | Model | Silicon | Page |
|---|---|---|---|
examples/silicon_kws/ | DS-CNN + GRU KWS (11 commands) | ✅ XC7Z020 | 08. kws_silicon |
examples/silicon_bearing/ | 1D-CNN bearing fault | ✅ XC7Z020 | 09. bearing_silicon |
examples/silicon_llm/ | nanoGPT 10.77M | ✅ XC7Z020 (L2 hybrid) | 10. llm_silicon_hybrid |
examples/silicon_kws/ is the model-definition origin (spec +
trained weights + golden + calib data) for P06. P06 took that same
model to silicon.
Next
For the general FPGA / Zynq flow → 07. fpga_overview.